Local area networks (LAN) are utilized to interconnect computers, terminals, word processors, facsimile and other office machines within a facility. Although a definition of a local area network can encompass many systems, it is typically directed toward systems that provide for high-speed transmission with typical data rates in the range of 50 Kb s to 150 Mb s, which utilizes some type of switching technology and is embedded within some form of network topology. The various technologies necessary to implement a local area network include transmission, switching and networking.
Local area network transmission is achieved in many ways, by transmitting over coax, twisted pairs or even optical fibers. Some of these mediums, such as the twisted pair medium, are limited in bandwidth. The media is utilized to transmit data, with the data being transmitted in the baseband. Typically, data rates as high as 100 Mb/s have been transmitted by using baseband coding techniques such as Manchester Coding, the most prominent of which is the Ethernet, which provides for transmission at either a 10 BASE-T or 100 BASE-T. These are well known standards.
When transmitting data over an Ethernet Interface, the data is transmitted as a sequence of xe2x80x9csymbolsxe2x80x9d which involve transmission of logic states at different levels. In one technique, a multi-level technique, a symbol can be at a positive level, a zero level or a negative level. The next symbol will be at the same level or will be at a different level yielding a transition between the two symbols. When transmitting the sequence of symbols, bandwidth is a consideration due to interference that occurs over the line from one end to the next. This interference can be due to such things as inter-symbol interference, near-end cross talk, etc. All of this noise will degrade the signal, which degradation must be accounted for. Typical solutions to this signal degradation is to use some type of equalizer, reduce clock jitter, etc.
The present invention disclosed and claimed herein comprises a timing recovery system for recovering timing information from a received data signal having multi-level data therein. The timing recovery system includes a phase encoder for determining the phase of the received data signal relative to a master clock signal. A phase error device is provided for determining the error between an output phase value and the phase of the received data signal in order to generate a phase error for each transition in the received data signal. The phase error device includes an averaging device for averaging the determined phase error value for each received transition in a decimation window. A decimation window has a predetermined potential transition length. A decimator is also provided for outputting the averaged phase error value from the averaging device at the end of each decimation window as the output phase value. A receive clock generator is provided to generate a clock having a phase value relative to the master clock equal to the phase error output by the decimator.